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september 2011 doc id 15068 rev 5 1/26 1 TDA7492P 25-watt + 25-watt dual btl class-d audio amplifier features 25 w + 25 w continuous output power at thd = 10% with v cc = 20 v and r l = 8 wide-range single-supply operation (8 - 26 v) high efficiency ( = 90%) four selectable, fixed gain settings of nominally 21.6 db, 27.6 db, 31.1 db and 33.6 db differential inputs minimize common-mode noise standby and mute features short-circuit protection thermal overload protection externally synchronizable ecopack ? , environmentally-friendly package description the TDA7492P is a dual btl class-d audio amplifier with single power supply, designed for lcd tvs and monitors. thanks to the high efficiency and exposed-pad- down (epd) package no heatsink is required. powersso-36 with exposed pad down table 1. device summary order code operating temp. range package packaging TDA7492P -40 to 85 c powersso-36 epd tube TDA7492P13tr -40 to 85 c powersso-36 epd tape and reel www.st.com
contents TDA7492P 2/26 doc id 15068 rev 5 contents 1 device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 characterizations for 6 loads with 18 v . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 characterizations for 8 loads with 20 v . . . . . . . . . . . . . . . . . . . . . . . . 13 5 applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.1 mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.2 gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.3 input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.4 internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.4.1 master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.4.2 slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.5 output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.6 protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.7 diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
TDA7492P list of tables doc id 15068 rev 5 3/26 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 7. gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 8. how to set up synclk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 9. powersso-36 epd dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures TDA7492P 4/26 doc id 15068 rev 5 list of figures figure 1. internal block diagram (showing one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. pin connections (top view, pcb view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. thd at 1 khz vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. thd at 100 hz vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. thd at 1 w vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 8. crosstalk vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. fft 0 db . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 10. fft -60 db . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 11. output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 12. thd at 1 khz vs output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 13. thd at 100 hz vs output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 14. thd at 1 w vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 15. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 16. crosstalk vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 17. fft 0 db . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 18. fft -60 db . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 19. test board (sz-lab-TDA7492P) layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 20. applications circuit for class-d amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 21. standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 22. turn-on/off sequence for minimizing speaker ?pop? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 23. device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 24. master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 25. typical lc filter for a 8- speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 26. typical lc filter for a 4- speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 27. behavior of pin diag for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 28. powersso-36 epd outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
TDA7492P device block diagram doc id 15068 rev 5 5/26 1 device block diagram figure 1 shows the block diagram of one of the two identical channels of the TDA7492P. figure 1. internal block diagram (showing one channel only)
pin description TDA7492P 6/26 doc id 15068 rev 5 2 pin description 2.1 pinout figure 2. pin connections (top view, pcb view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 sub_gnd outpb outpb pgndb pgndb pvccb pvccb outnb outnb outna outna pvcca pvcca pgnda pgnda outpa outpa pgnd vss svcc vref innb inpb gain1 gain0 diag sgnd vdds synclk rosc inna inpa mute stby vddpw svr exposed pad down (connect to ground)
TDA7492P pin description doc id 15068 rev 5 7/26 2.2 pin list table 2. pin description list number name type description 1 sub_gnd pwr connect to the frame 2,3 outpb o positive pwm for right channel 4,5 pgndb pwr power stage ground for right channel 6,7 pvccb pwr power supply for right channel 8,9 outnb o negative pwm ou tput for right channel 10,11 outna o negative pwm output for left channel 12,13 pvcca pwr power supply for left channel 14,15 pgnda pwr power stage ground for left channel 16,17 outpa o positive pwm output for left channel 18 pgnd pwr power stage ground 19 vddpw o 3.3-v (nominal) regulator output referred to ground for power stage 20 stby i standby mode control 21 mute i mute mode control 22 inpa i positive differential input of left channel 23 inna i negative differential input of left channel 24 rosc o master oscillator frequency-setting pin 25 synclk i/o clock in/out for external oscillator 26 vdds o 3.3-v (nominal) regulator output referred to ground for signal blocks 27 sgnd pwr signal ground 28 diag o open-drain diagnostic output 29 svr o supply voltage rejection 30 gain0 i gain setting input 1 31 gain1 i gain setting input 2 32 inpb i positive differentia l input of right channel 33 innb i negative differentia l input of right channel 34 vref o half vdds (nominal) referred to ground 35 svcc pwr signal power supply 36 vss o 3.3-v (nominal) regulator output referred to power supply - ep pwr exposed pad for connection to ground plane as heatsink
electrical specifications TDA7492P 8/26 doc id 15068 rev 5 3 electrical specifications 3.1 absolute maximum ratings 3.2 thermal data 3.3 electrical specifications unless otherwise stat ed, the results in ta bl e 5 below are given for the conditions: v cc =20v, r l (load) = 8 , r osc = r3 = 39 k , c8 = 100 nf, f = 1 khz, g v = 21.6 db, and tamb = 25 c. table 3. absolute maximum ratings symbol parameter value unit v ccmax dc supply voltage for pins pvcca, pvccb, svcc 30 v v i voltage limits for input pins standby, mute, inna, inpa, innb, inpb, gain0, gain1 -0.3 to 3.6 v t op operating temperature -40 to 85 c t j junction temperature -40 to 150 c t stg storage temperature -40 to 150 c table 4. thermal data symbol parameter min typ max unit r th j-case thermal resistance, junction to case - 2 3 c/w r th j-amb thermal resistance, junction to ambient - 24 (1) 1. fr4 with vias to copper area of 9 cm 2 -c/w table 5. electrical specifications symbol parameter condition min typ max unit v cc supply voltage for pins pvcca, pvccb, svcc -8-26v i q total quiescent - - 26 35 ma i qstby quiescent current in standby - - 2.5 5.0 a v os output offset voltage play mode --100mv mute mode - - 60 mv i ocp overcurrent protection threshold r l = 0 3.8 4.2 - a t jsd junction temperature at thermal shutdown - - 150 - c r i input resistance differential input 48 60 - k
TDA7492P electrical specifications doc id 15068 rev 5 9/26 v ovp overvoltage protection threshold - 28 29 - v v uvp undervoltage protection threshold - --7v r dson power transistor on resistance high side - 0.2 - low side - 0.2 - p o output power thd = 10% - 25 - w thd = 1% - 20 - p o output power v cc = 12 v, thd = 10% - 9.5 - w v cc = 12 v, thd = 1% - 7.2 - p d power dissipated by device p o = 25 w + 25 w, thd = 10% -5.0-w efficiency p o = 10 w + 10 w 80 90 - % thd total harmonic distortion p o = 1 w - 0.1 0.4 % g v closed-loop gain gain0 = l, gain1 = l 20.6 21.6 22.6 db gain0 = l, gain1 = h 26.6 27.6 28.6 gain0 = h, gain1 = l 30.1 31.1 32.1 gain0 = h, gain1 = h 32.6 33.6 34.6 g v gain matching - - - 1 db ct cross talk f = 1 khz - 50 - db en total input noise a curve, g v = 20 db - 20 - v f = 22 hz to 22 khz - 25 35 svrr supply voltage rejection ratio fr = 100 hz, vr = 0.5 v, c svr = 10 f 40 50 - db t r , t f rise and fall times - - 50 - ns f sw switching frequency internal oscillator 290 310 330 khz f swr output switching frequency range with internal oscillator (1) 250 - 400 khz with external oscillator (2) 250 - 400 v inh digital input high (h) - 2.3 - - v v inl digital input low (l) - - 0.8 a mute mute attenuation v mute = 1 v 60 80 - db 1. f sw = 10 6 / ((16 * r osc + 182) * 4) khz, f synclk = 2 * f sw with r3 = 39 k , see figure 20. 2. f sw = f synclk / 2 with the frequency of the external oscillator. table 5. electrical specifications (continued) symbol parameter condition min typ max unit
characterization curves TDA7492P 10/26 doc id 15068 rev 5 4 characterization curves the following characterizations were made using the sz-lab-TDA7492P demo board. the layout is shown in figure 19 on page 16 . the lc filter for the 6 load used 22 h and 220 nf components, whilst that for the 8 load used 33 h and 220 nf. 4.1 characterizations for 6 loads with 18 v figure 3. output power vs. supply voltage figure 4. thd at 1 khz vs. output power 0 2 4 6 8 10 12 14 16 1 8 20 22 24 26 2 8 89 10 11 12 1 3 14 15 16 17 1 8 te s t condition s : vcc = 8 to 1 8 v, rl = 6 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: vcc =1 8 v, rl = 6 po = 25 w @thd = 10 % po = 20 w @thd = 1 % thd = 1 % thd = 10 % o u tp u t power (w) su pply volt a ge (v) thd ( % ) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 200m 3 0 500m 1 2 5 10 20 te s t condition s : vcc = 1 8 v, rl = 6 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 25 w @thd = 10 % o u tp u t power (w)
TDA7492P characterization curves doc id 15068 rev 5 11/26 figure 5. thd at 100 hz vs. output power figure 6. thd at 1 w vs. frequency figure 7. frequency response thd ( % ) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 200m 3 0 500m 1 2 5 10 20 te s t condition s : vcc = 1 8 v, rl = 6 , ro s c= 39 k ,co s c = 100 nf, f = 100 hz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 25 w @thd = 10 % fre qu ency (hz) thd ( % ) 0.005 0.5 0.01 0.02 0.05 0.1 0.2 20 20k 50 100 200 500 1k 2k 5k 10k te s t condition s : vcc = 1 8 v, rl = 6 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c s pecific a tion limit: typic a l: thd < 0.4 % ampl (db) s pecific a tion limit: m a x: +/- 3 db @20 hz to 20 khz te s t condition s : vcc = 1 8 v, rl = 6 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c -5 +2 -4 - 3 -2 -1 -0 +1 10 3 0k 20 50 100 200 500 1k 2k 5k 10k fre qu ency (hz)
characterization curves TDA7492P 12/26 doc id 15068 rev 5 figure 8. crosstalk vs frequency figure 9. fft 0 db figure 10. fft -60 db cro ss t a lk (db) s pecific a tion limit: typic a l: > 50 db @f = 1 khz te s t condition s : vcc = 1 8 v, rl = 6 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c -120 -60 -115 -110 -105 -100 - 9 5 - 9 0 - 8 5 - 8 0 -75 -70 -65 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) fre qu ency (hz) fft (db) s pecific a tion limit: typic a l: > 60 db for the h a rmonic fre qu ency te s t condition s : vcc = 1 8 v, rl = 6 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c -150 +10 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k -150 +0 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k s pecific a tion limit: typic a l: > 9 0db for the h a rmonic fre qu ency te s t condition s : vcc = 1 8 v, rl = 6 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = -60 db @1 w = 0 db t a m b = 25 c fft (db) fre qu ency (hz)
TDA7492P characterization curves doc id 15068 rev 5 13/26 4.2 characterizations for 8 loads with 20 v figure 11. output power vs supply voltage figure 12. thd at 1 khz vs output power 2 4 6 8 10 12 14 16 1 8 20 22 24 26 2 8 89 10 11 12 1 3 14 15 16 17 1 8 1 9 20 su pply volt a ge (v) o u tp u t power (w) te s t condition s : vcc = 8 to 20 v, rl = 8 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: v s = 20 v, rl = 8 po = 25 w @thd = 10 % po = 20 w @thd = 1 % thd = 1 % thd = 10 % thd ( % ) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 3 0 200m 500m 1 2 5 10 20 te s t condition s : vcc = 20 v, rl = 8 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 25 w @thd = 10 % o u tp u t power (w)
characterization curves TDA7492P 14/26 doc id 15068 rev 5 figure 13. thd at 100 hz vs output power figure 14. thd at 1 w vs frequency figure 15. frequency response thd ( % ) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 3 0 200m 500m 1 2 5 10 20 te s t condition s : vcc = 20 v, rl = 8 , ro s c= 39 k ,co s c = 100 nf, f = 100 hz, gv = 3 0 db, t a m b = 25 c s pecific a tion limit: typic a l: po = 25 w @thd = 10 % o u tp u t power (w) fre qu ency (hz) thd ( % ) 0.005 0.5 0.01 0.02 0.05 0.1 0.2 20 20k 50 100 200 500 1k 2k 5k 10k te s t condition s : vcc = 20 v, rl = 8 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c s pecific a tion limit: typic a l: thd < 0.4 % ampl (db) s pecific a tion limit: m a x: +/- 3 db @20 hz to 20 khz te s t condition s : vcc = 20 v, rl = 8 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c -5 +2 -4 - 3 -2 -1 -0 +1 10 3 0k 20 50 100 200 500 1k 2k 5k 10k 20k fre qu ency (hz)
TDA7492P characterization curves doc id 15068 rev 5 15/26 figure 16. crosstalk vs frequency figure 17. fft 0 db figure 18. fft -60 db cro ss t a lk (db) s pecific a tion limit: typic a l: > 50 db @f = 1 khz te s t condition s : vcc = 20 v, rl = 8 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c -120 -60 -115 -110 -105 -100 - 9 5 - 9 0 - 8 5 - 8 0 -75 -70 -65 20 20k 50 100 200 500 1k 2k 5k 10k t t t t t t t t t t t t t t t t tt t t t t t t t t t t t t t t fre qu ency (hz) fft (db) s pecific a tion limit: typic a l: > 60 db for the h a rmonic fre qu ency te s t condition s : vcc = 20 v, rl = 8 * ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = 1 w t a m b = 25 c -150 +10 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k fre qu ency (hz) -150 +0 -140 -1 3 0 -120 -110 -100 - 9 0 - 8 0 -70 -60 -50 -40 - 3 0 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k s pecific a tion limit: typic a l: > 9 0 db for the h a rmonic fre qu ency te s t condition s : vcc = 20 v, rl = 8 , ro s c= 39 k ,co s c = 100 nf, f = 1 khz, gv = 3 0 db, po = -60 db (1 w = 0 db) t a m b = 25 c fft (db) fre qu ency (hz)
characterization curves TDA7492P 16/26 doc id 15068 rev 5 figure 19. test board (sz-lab-TDA7492P) layout 2 . test board
TDA7492P applications circuit doc id 15068 rev 5 17/26 5 applications circuit figure 20. applications circuit for class-d amplifier ,1/ ,1/ ,15 ,15 9&& *1' 287/ 287/ 2875 2875 7'$36oxjgrzq /&),/7(5&20321(17 /rdg //// && rkp rkp rkp x+ x+ x+ q) q) q) 087( 67%< 932:(56833/< rkp x+ q) )ru 6lqjoh(qghg ,qsxw )ru 6lqjoh(qghg ,qsxw &/$66'$03/,),(5 7'$3 & & & & x) 9 & q) 5 . / x+ & q) & q) & q) & q) & q) & q) & q) & s) 5 5 / x+ & q) & q) / x+ & s) 5 5 / x+ & q) & q) & q) & q) & q) & q) ,13% 966 2871% 3*1'% 39&&% 2873% 2871$ 39&&$ 3*1'$ 2873$ ,11% 2871% 3*1'% 087( 39&&% 2873% 695 2871$ 68%b*1' ,13$ ,11$ 6*1' 9''6 ',$* 9''3: 3*1' 67%< 526& *$,1 69&& *$,1 6<1&/. 2873$ 3*1'$ 95() 39&&$ ,& 5 n 5 5 & q) 5 n 5 n 5 n & q) & q) & q) - - 6 6 & q) & x) *1' 287 ,1 ,& /&= /&= /&= /&= & x) 9 - - - - - - & x) 9 & x) 9 & x) 9 5 n ',$* 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 9''6 9''6 9&& 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 9 9 6*1' 6*1' 6*1' 6*1' 6*1' 6<1&/. jumper settings for gain: gain0 : gain1 nominal gain 0 v : 0 v 21.6 db 0 v : 3.3 v 27.6 db 3.3 v : 0 v 31.1 db 3.3 v : 3.3 v 33.6 db switch settings for standby, mute and play: stby : mute mode 0 v : 0 v standby 0 v : 3.3 v standby 3.3 v : 0 v mute 3.3 v : 3.3 v play TDA7492P lc filter components load l1,l2,l3,l4 c20,c26 4 15 h 470 nf 6 22 h 220 nf 8 33 h 220 nf 16 68 h 220 nf
applications information TDA7492P 18/26 doc id 15068 rev 5 6 applications information 6.1 mode selection the three operating modes of the TDA7492P are set by the two inputs stby (pin 20) and mute (pin 21). standby mode: all circuits are turned off, very low current consumption. mute mode: inputs are connected to ground and the positive and negative pwm outputs are at 50% duty cycle. play mode: the amplifiers are active. the protection functions of t he TDA7492P are enabled by pullin g down the voltages of the stby and mute inputs shown in figure 21 . the input current of the corresponding pins must be limited to 200 a. figure 21. standby and mute circuits figure 22. turn-on/off sequence for minimizing speaker ?pop? table 6. mode settings mode selection stby mute standby l (1) 1. drive levels defined in table 5: electrical s pecifications on page 8 x (don?t care) mute h (1) l play h h TDA7492P stby mute 0 v 3.3 v c7 2.2 f r2 30 k standby 0 v 3.3 v c15 2.2 f r4 30 k mute vcc stby mute input output i q standby mute play mute standby t t t t t t 0 0 0 0 0 0
TDA7492P applications information doc id 15068 rev 5 19/26 6.2 gain setting the gain of the TDA7492P is set by the two inputs, gain0 (pin 30) and gain1 (pin31). internally, the gain is set by changing the feedback resistors of the amplifier. 6.3 input resistance and capacitance the input impedance is set by an internal resistor ri = 60 k (typical). an input capacitor (ci) is required to couple the ac input signal. the equivalent circuit and frequency response of the input components are shown in figure 23 . for ci = 470 nf the high-pass filter cutoff frequency is below 20 hz: fc = 1 / (2 * * ri * ci) figure 23. device input circuit and frequency response table 7. gain settings gain0 gain1 nominal gain, g v (db) 0021.6 0127.6 1031.1 1133.6 ri input ci rf input pin signal
applications information TDA7492P 20/26 doc id 15068 rev 5 6.4 internal and external clocks the clock of the class-d amplifier can be generated internally or can be driven by an external source. if two or more class-d amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. this can be implemented by using one TDA7492P as master clock, while the other devices are in slave mode (that is, externally clocked. the clock interconnect is via pin synclk of each device. as explained below, synclk is an output in master mode and an input in slave mode. 6.4.1 master mode (internal clock) using the internal oscillator, th e output switching frequency, f sw , is controlled by the resistor, r osc , connected to pin rosc: f sw = 10 6 / ((16 * r osc + 182) * 4) khz where r osc is in k . in master mode, pin synclk is used as a clock output pin, whose frequency is: f synclk = 2 * f sw for master mode to operate correctly then resistor r osc must be less than 60 k as given below in ta b l e 8 . 6.4.2 slave mode (external clock) in order to accept an external clock input the pin rosc must be left open, that is, floating. this forces pin synclk to be internally configured as an input as given in ta bl e 8 . the output switching frequency of the slave devices is: f sw = f synclk / 2 s figure 24. master and slave connection table 8. how to set up synclk mode rosc synclk master r osc < 60 k output slave floating (not connected) input synclk rosc TDA7492P rosc cosc rosc synclk TDA7492P 39 k 100 nf output input master slave
TDA7492P applications information doc id 15068 rev 5 21/26 6.5 output low-pass filter to avoid emi problems, it may be necessary to use a low-pass filter before the speaker. the cutoff frequency should be larger than 22 khz and much lower than the output switching frequency. it is necessary to choose the l-c component values depending on the loud speaker impedance. some typical values, which give a cutoff frequency of 27 khz, are shown in figure 25 and figure 26 below. figure 25. typical lc filter for a 8- speaker figure 26. typical lc filter for a 4- speaker
applications information TDA7492P 22/26 doc id 15068 rev 5 6.6 protection functions the TDA7492P is fully protected against overvoltages, undervoltages, overcurrents and thermal overloads as explained here. overvoltage protection (ovp) if the supply voltage exceeds the value for v ovp given in table 5: electrical specifications on page 8 the overvoltage protection is activated which forces the outputs to the high-impedance state. when the supply voltage drops to below the threshold value the device restarts. undervoltage protection (uvp) if the supply voltage drops below the value for v uvp given in table 5: electrical specifications on page 8 the undervoltage protection is activated which forces the outputs to the high-impedance state. when the supply voltage recovers the device restarts. overcurrent protection (ocp) if the output current exceeds the value for i ocp given in table 5: electrical specifications on page 8 the overcurrent protection is activated which forces the outputs to the high-impedance state. periodically, the device attempts to restart. if the overcurrent condition is still present then the ocp remains active. the restart time, t oc , is determined by the r-c components connected to pin stby. thermal protection (otp) if the junction temperature, t j , reaches 145 c (nominally), the device goes to mute mode and the positive and negative pwm outputs are forced to 50% duty cycle. if the junction temperature reaches the value for t j given in table 5: electrical specifications on page 8 the device shuts down and the output is forced to the high-impedance state. when the device cools sufficiently the device restarts. 6.7 diagnostic output the output pin diag is an open-drain transistor. when the protection is activated it is in the high-impedance state. the pin can be connected to a power supply (<26 v) by a pull-up resistor whose value is limited by the maximum sinking current (200 a) of the pin. figure 27. behavior of pin diag for various protection conditions TDA7492P protection logic r1 diag vdd vdd overcurrent protection restart restart ov, uv, ot protection
TDA7492P package mechanical data doc id 15068 rev 5 23/26 7 package mechanical data the TDA7492P comes in a 36-pin powersso package with exposed pad down. figure 28 below shows the package outline and ta bl e 9 gives the dimensions. in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 9. powersso-36 epd dimensions symbol dimensions in mm dimensions in inches min typ max min typ max a 2.15 - 2.45 0.085 - 0.096 a2 2.15 - 2.35 0.085 - 0.093 a1 0 - 0.10 0 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 d 10.10 - 10.50 0.398 - 0.413 e 7.40 - 7.60 0.291 - 0.299 e - 0.5 - - 0.020 - e3 - 8.5 - - 0.335 - f - 2.3 - - 0.091 - g- - 0.10 - - 0.004 h 10.10 - 10.50 0.398 - 0.413 h- - 0.40 - - 0.016 k 0 - 8 degrees 0 - 8 degrees l 0.60 - 1.00 0.024 - 0.039 m - 4.30 - - 0.169 - n - - 10 degrees - - 10 degrees o - 1.20 - - 0.047 - q - 0.80 - - 0.031 - s - 2.90 - - 0.114 - t - 3.65 - - 0.144 - u - 1.00 - - 0.039 - x 4.10 - 4.70 0.161 - 0.185 y 4.90 - 7.10 0.193 - 0.280
package mechanical data TDA7492P 24/26 doc id 15068 rev 5 figure 28. powersso-36 epd outline drawing h x 45
TDA7492P revision history doc id 15068 rev 5 25/26 8 revision history table 10. document revision history date revision changes 30-sep-2008 1 initial release. 11-may-2009 2 updated supply operating range to 8 v - 26 v on page 1 changed c1 to c8 at beginning of section 3.3 on page 8 updated table 5: electrical specifications on page 8 for v cc min, v os min/max and added new parameter v uv updated figure 20: applications circuit for class-d amplifier on page 17 inserted brackets in equation in ta b l e 5 footnote and in section 6.4.1 on page 20 updated values in uvp and ocp in section 6.6 on page 22 updated voltage to ?<26 v? in section 6.7 on page 22 updated max dimensions for a and a2 in table 9: powersso-36 epd dimensions on page 23 . 02-sep-2009 3 updated value for g v at head of section 3.3 on page 8 updated package y (min) dimension in table 9 on page 23 . 19-jan-2011 4 updated operating temperature range updated datasheet presentation. 12-sep-2011 5 updated outna in table 2: pin description list
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